Field of the Invention
The present invention relates to a semiconductor package assembly, and in particular to ground TSV interconnect arrangements for the three-dimensional (3D) semiconductor package assembly.
Description of the Related Art
For electronics engineering, a through silicon via (TSV) is a vertical electrical connection which passes completely through a silicon wafer or die. A TSV is formed by high-performance techniques, when compared to alternatives such as package-on-package. A TSV is used to create three-dimensional (3D) semiconductor packages and 3D integrated circuits. The density of the via of a TSV is substantially higher than the alternatives as the length of connections are shorter.
For memory applications with increased levels of integration as well as improved performance, bandwidth, latency, power, weight and form factor, the signal pad to ground pad ratio becomes important to improve the coupling effect.
Thus, a novel 3D semiconductor package is desirable.